Computer systems manipulate and transfer data in memory devices such as, but not limited to, random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), etc.
Error correcting code (ECC) memory such as DRAM can detect and correct the most common types of internal data corruption. ECC memory maintains a memory system effectively free from single-bit errors where the data read from each word is always the same as the data that had been written to it, even if a single bit has been stored or, in some cases, has been flipped to the wrong state.
Certain computer systems are designed to meet requirements for large arrays of memory along with a high level of data integrity within the system. For these systems, standard DRAM memory with ECC is often not the best choice due to constraints such as high costs, design limitations and/or non-availability of error correction in memory modules.
Another consideration in computer system design is the channel bandwidth which generally defines the net bit rate, channel capacity, or maximum throughput of a communication path, such as across a digital communication network, or to and from memory channels in a computer. A large bandwidth is desirable and sometimes necessary for transmitting and receiving large quantities of data.
Currently available DRAM memory used in computer systems includes error correction code capability so when data packets are transferred over a network and received at a computer, that computer will most likely have DRAM memory with ECC to ensure data integrity. However as implied above, some computers requiring high storage capacity and bandwidth are better served using TSV-DRAM memory. Of course for any computer system some form of data correction is essential for accurate data storage and recall.
Some computer systems requiring a high level of data integrity necessitate the use of error detection and correction on large arrays of memory. However, if a system design cannot utilize DRAM with ECC logic due to cost, design limitations or availability, then other methods must be used to ensure data integrity.
One method of implementing data correction into a computer system that uses other than standard DRAM-ECC memory chips and logic is to implement ECC logic into a memory controller and store the error correction code along with the data on the DRAM module. However, this method requires two accesses for every write and read: one access to write or read the data, and a second access to write or read the ECC value. This dual write/read requirement effectively has the deleterious effect of cutting the bandwidth of the DRAM channel in half.